Omid Kavehei

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Omid Kavehei
Omid kavehei.png
Person_Name: Omid Kavehei
Birth_Date: 1981
Birth_Place: Arak, Iran
Fields: Nanoelectronics, nonvolatile electronics, biomedical devices, memristive devices and systems, neuromorphic VLSI.
Workplaces: University of Melbourne
Undergrad_University: Azad University of Arak
Undergrad_Degree: Computer System Engineering (2003)
Project_Advisors: Keivan Navi
Masters_University: Shahid Beheshti University
Masters_Degree: Computer Systems Architecture Engineering (2005)
Masters_Advisors: Keivan Navi
Doctoral_University: University of Adelaide
Doctoral_Degree: Electrical & Electronic Engineering (2012)
Doctoral_Advisors: Said F. Al-Sarawi and Derek Abbott
Awards : EIPRS (2008)

D. R. Stranks Travelling Fellowship (2009)
World Class University Fellowship (2009)
Simon Rockliff Scholarship (2010)
Research Abroad Scholarship (2010)
World Class University Fellowship (2010)
Young Nanotechnology Ambassador (2011)


Omid Kavehei was born in Arak, Iran, in 1981. From 1999 to 2003, he stayed in his hometown to obtain his Bachelor’s Degree in Computer System Engineering with the highest rank in 2003 from Azad University of Arak. His final year research project was carried out under Keivan Navi on Current-Mode Computing. Soon after graduating, he joined the Microelectronics group at the Shahid Beheshti University (formerly National University of Iran), Tehran, Iran, in 2003. He obtained his Master’s Degree in Computer Systems Architecture Engineering again with highest rank, under Keivan Navi on Very Large Scale Integration (VLSI) Design Aspects of Arithmetic Circuits: Adders, Compressors, and Multipliers. He also carried out several research projects on system-on-chip, digital signal processing, analogue computing, operating systems, distributed systems, control, and bioinformatics. He was accepted to the PhD program on Computer Systems Architecture Engineering at his alma mater with highest rank in both written and oral exams. He finished two years of course work with 92 percent average. Courses include, Quantum Computing, Graph Theory, Special Topics in Digital Signal Processing, Arithmetic Aspects of VLSI, Modeling and Analysis of Digital Systems. In 3rd March 2008, he successfully passed oral exam for a PhD proposal on Low-Power Circuit Design in Ultra Deep-Submicron CMOS Technology to investigate impact of yield aware design techniques on the energy consumption of advanced CMOS technologies used in computer arithmetic system implementation. He remained in this position until he moved to Australia. He also served at his alma mater as a research and teaching assistant and a casual lecturer. In this role, he conducted VLSI Design course and Digital Logic Design Labs in the Department of Computer Engineering.

In 2008, he was granted an Australian Endeavour International Postgraduate Research Scholarship (EIPRS) and University of Adelaide Scholarship to pursue his PhD under Said F. Al-Sarawi and Derek Abbott, the School of Electrical & Electronic Engineering, The University of Adelaide. In 2009 and 2010, he was a Visiting Scholar at the Technology Park, the Chungbuk National University, South Korea, hosted by Kamran Eshraghian. During his candidature, Kavehei received a D. R. Stranks Travelling Fellowship, 2009, Simon Rockliff Scholarship for the most outstanding postgraduate mentorship from the School of Electrical & Electronic Engineering and DSTO, 2010, Research Abroad Scholarship, 2010, and the Korea’s World Class University program research fellowships, 2009 and 2010. He was also a student member of the IEEE, IEEE Communications Society, the Institution of Engineers Australia, Australasian Association for Engineering Education, WCU (KOSEF) project member, and an executive member of the SA IEEE student chapter called the Electrical and Electronic Engineering Society of Adelaide University. In 2011, he received the Young Nanotechnology Ambassador award fromm the ARC Australian Nanotechnology Network.


Bachelor's degree

Master's degree

  • Computer Systems Architecture Engineering (2005), Shahid Beheshti University, Iran
  • Thesis: Very Large Scale Integration (VLSI) Design Aspects of Arithmetic Circuits: Adders, Compressors, and Multipliers, under Keivan Navi

Doctoral degree

Postdoctoral positions

Awards

Scientific genealogy

Google Scholar profile

Journal articles

[1] K. Eshraghian, O. Kavehei, J. M. Chappell, A. Iqbal, S. Al-Sarawi, and D. Abbott, "Memristive device fundamentals and modeling: Applications to circuits and systems simulation," Proceedings of the IEEE, Vol. 100, No. 6, 2012, pp. 1991–2007, http://dx.doi.org/10.1109/JPROC.2012.2188770

[2] O. Kavehei, S. Al-Sarawi, K. R. Cho, K. Eshraghian, and D. Abbott, "An analytical approach for memristive nanoarchitectures," IEEE Transactions on Nanotechnology, Vol. 11, No. 2, pp. 374–385, 2012, http://dx.doi.org/10.1109/TNANO.2011.2174802

[3] K. Eshraghian, K.-R. Cho, O. Kavehei, S. M.-S. Kang, and D. Abbott, "Memristor MOS Content Addressable Memory (MCAM): Hybrid architecture for future high performance search engines," IEEE Trans. Very Large Scale Integration (VLSI) Systems, Vol. 9, No. 8, pp. 1407–1417, 2011, http://dx.doi.org/10.1109/TVLSI.2010.2049867

[4] O. Kavehei, A. Iqbal, Y. S. Kim. K. Eshraghian, S. Al-Sarawi, and D. Abbott, "The fourth element: characteristics, modelling and electromagnetic theory of the memristor," Proceedings of the Royal Society A, Vol. 466, No. 2120, pp. 2175–2202, 2010.

Conference articles

[5] M. R. Azghadi, O. Kavehei, S. Al-Sarawi , N. Iannella, D. Abbott, "Triplet based spike-timing dependent plasticity in silicon," Proc. 21st Annual Conference of the Japanese Neural Network Society, (JNNS 2011), Okinawa Institute of Science and Technology (OIST), Okinawa, Japan, December 15–17, 2011, art. no. P3–35, http://jnns.org/conference/2011/Proceedings.html

[6] M. R. Azghadi, O. Kavehei, S. Al-Sarawi, N. Iannella, and D. Abbott, "Novel VLSI implementation for triplet-based spike-timing dependent plasticity," Proc. 7th International Conference on Intelligent Sensors, Sensor Networks and Information Processing, (ISSNIP 2011), Adelaide, Australia, December 6–9, 2011, pp. 158–162, http://dx.doi.org/10.1109/ISSNIP.2011.6146525

[7] O. Kavehei, K. Cho, S. Lee, S.-J. Kim, S. Al-Sarawi, D. Abbott, and K. Eshraghian, "Fabrication and modeling of Ag/TiO2/ITO memristor," Proc. IEEE 54th International Midwest Symposium Circuits and Systems, (MWSCAS), Seoul, Korea, August 7–10, 2011, pp. 1–4, http://dx.doi.org/10.1109/MWSCAS.2011.6026575

[8] O. Kavehei, S. Al-Sarawi, K.-R. Cho, N. Iannella, S.-J. Kim, K. Eshraghian, and D. Abbott, "Memristor-based synaptic networks and logical operations using in-situ computing," Proc. 7th International Conference on Intelligent Sensors, Sensor Networks and Information Processing (ISSNIP 2011), Adelaide, Australia, December 6–9, 2011, pp. 137–142, http://dx.doi.org/10.1109/ISSNIP.2011.6146610

O. Kavehei, S. Lee, K.-R. Cho, S. Al-Sarawi, K. Eshraghian, and D. Abbott, "Integrated memristor-MOS (M2) smart sensor for basic pattern matching applications," International Conference on Advanced Electromaterials, (ICAE2011), Jeju, Korea, November 7–10, 2011, pp. xx

O. Kavehei, S. Lee, K.-R. Cho, S. Al-Sarawi and D. Abbott , "Analysis of pulse-frequency modulation CMOS image sensors," International Conference on Advanced Electromaterials, (ICAE2011), Jeju, Korea, November 7–10, 2011, pp. xx

[9] O. Kavehei, Y.-S. Kim, A. Iqbal, K. Eshraghian, S. F. Al-Sarawi, D. Abbott, "The fourth element: Insights into the memristor," International Conference on Communications, Circuits and Systems, (ICCAS 2009), Milpitas, CA, USA, July 23–25, 2009, pp. 921–927, http://dx.doi.org/10.1109/ICCCAS.2009.5250370

See also

External links

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